1. Field of the Invention
The invention concerns a data and signaling time slot transfer and processing system for a set of multiplex lines.
2. Description of the Prior Art
In modern telecommunication networks, information is transmitted on a common multiplex line in the form of coded pulses contained in the time slots of a frame. Conventionally, a frame has a duration of 125 microseconds and is divided into 32 intervals referred to as time slots. The multiplex line functions at 2.048 MHz with each channel in the frame having a flow of 64 kbits/s. Certain channels contain signals in the form of a message or of particular data, which it is necessary to extract and to process at certain locations of the telecommunications network. Likewise, at these locations, it is necessary to insert, on certain channels of the multiplex line, signals in the form of messages or of particular data. These particular data can for example be switched messages in the form of bundles in accordance with CCITT Notice X25.
This processing is carried out either in the digital exchange to which the multiplex lines are connected or in a remote line unit connected to the digital exchange by multiplex lines. The processing is carried out in a digital control unit located either in the digital exchange or in the remote line unit. In a remote line unit, for example, the digital control unit controls the operation of the remote line unit as a whole and the links between the latter and analog or digital subscriber lines on the one hand and with the digital exchange on the other hand.
The processing for a set of n multiplex lines is carried out by serial communication controllers which format and assemble the so-called HDLC (High Data Level Control) frames. A serial communication controllers is assigned to a time slot of a multiplex line for the entire duration of an exchange in this time slot. The controllers may then be assigned to another time slot of the same multiplex line or to any time slot of another multiplex line from the set of multiplex lines.
It is therefore necessary to extract the time slots from each multiplex line to route them to a controllers and to retransmit them after processing by the controllers in a time slot of a multiplex line. One solution to the problem of extracting and injecting a time slot from and into a multiplex line is described in an article entitled "Elements de multiplexage MIC 30 voies TNE de la deuxieme generation" in the periodical Cables et Transmission 32e A, No 2 April 1978 pages 152 to 191. This solution employs serial and parallel registers which may be associated with a serial communication controlles. If there are n multiplex lines and m controllers, each controllers being assignable to any time slot of any multiplex line, it is also possible to provide receive and transmit selection units for each controllers, a serial communication controllers and the set of units associated with it constituting an individual subsystem.
The associated units essentially comprise: an eight-bit register which receives the number of the multiplex line to be selected and the number of the selected time slot on this multiplex line; a multiplexer for selecting one of n multiplex lines and for routing the selected multiplex line to the controler; a demultiplexer providing for transmission to the controllers on one of n multiplex lines, the demultiplexer being controled in synchronism with the multiplexer; two eight-bit registers for transfering the content of the selected time slot to the controllers, a first register being loaded at the 2.048 Mbit/s bit rate during the time corresponding to that of the time slot and its contents then being transfered in parallel into the second register the content of which is then transfered serially to the controllers at the regular 64 kbit/s bit rate; and two eight-bit registers for serial transmission from the controllers to a multiplex line, the first register receiving information from the controllers at the 64 kbit/s bit rate and the second register receiving the information from the first register in parallel and transmitting it serially at the 2.048 Mbit/s bit rate. A clock signal generator provides the signals necessary to operation of the individual subsystems.
Thus the individual subsystems require a relatively large number of units, which increases their cost and the space required for their installation.
The object of the invention is to reduce the cost and the bulk of a data and signaling time slot transfer and processing system for a set of multiplex lines.